Deep within the lithography R&D base, in the laboratory custom‑built for the EUV prototype—where cleanliness and environmental stability reached extremes—the air seemed vacuum‑pumped, leaving only a near‑solidified silence mingled with anticipation and immense pressure. Unlike the relatively mature atmosphere during the previous DUV lithography tape‑out, this time, what lingered in every heart was a stark sense of stepping into a true terra incognita, challenging physical limits. Xiuxiu stood before the observation window, encased in stringent anti‑static cleanroom garments, her breath heavy behind the mask; her gaze, like the finest probe, pierced the special glass, firmly fixed on the massive, intricate equipment at the laboratory's center—the **extreme ultraviolet lithography prototype** that condensed countless efforts of her and the team, bridging innumerable technical chasms in light source, reticle, optics, wafer stage, before finally being integrated.
Today was its first real test, the second tape‑out, yet its significance differed entirely from the previous DUV tape‑out. This was the decisive step from mature deep‑ultraviolet lithography toward next‑generation extreme ultraviolet lithography—from zero to one. The target of this tape‑out was no longer a complex chip for clients, but a relatively simple test chip with one core objective: verifying the prototype's most basic function—whether it could use 13.5‑nanometer extreme ultraviolet light to accurately pattern designed features onto silicon.
The challenges were unprecedented. Compared to DUV lithography, EUV lithography wasn't merely a shortening of wavelength; it brought fundamental changes in physical principles and engineering difficulties. Xiuxiu's mind clearly recalled the hardships they'd endured to overcome these hurdles, with the two most critical mountains being insufficient **source power and light intensity**, and the consequently forced adoption of extremely complex **multiple‑patterning** technology.
**Inherent Source Deficiency and Engineering Limits:** Although Xiuxiu's team had achieved breakthroughs in the light source, stabilizing power above 250 watts—reaching the entry threshold for commercial application—the efficiency of EUV photon generation remained extremely low; energy‑conversion efficiency from laser‑pulsed tin‑droplet plasma was merely a few percent. This meant that the final EUV intensity reaching the silicon wafer surface still appeared "weak" compared to conventional DUV lithography. This faint light, like a candle in the wind, had to accomplish the heavy task of inducing sufficient chemical change in the photoresist. To solve this, they were compelled to adopt **metal‑based photoresist** more sensitive to EUV light. This resist, like an exceptionally keen‑scented hound, required only minimal photon signals to be "awakened," yet its process window was narrower, its control and processing difficulty rising exponentially.
Yet even with the most advanced photoresist, the resolution and pattern fidelity achievable through a single exposure remained inadequate facing the test chip's even more shrunken lines and spaces. The physical diffraction limit stood like an invisible wall before them.
Then they had to wield that double‑edged sword—**multiple‑patterning**.
Xiuxiu's thoughts returned to technical details. Multiple‑patterning, as the name implies, no longer attempts to print all circuit patterns in one exposure; instead, it **decomposes** the originally dense, single‑layer circuit layout into two, three, or even more **reticles**, then through multiple, **sequential** lithography, etching, and other process steps, precisely **aligns and overlays** these decomposed, relatively sparse patterns onto the silicon wafer like "nesting dolls" or "jigsaw pieces," ultimately "synthesizing" the initially designed, high‑density circuit structure on the wafer.
This might sound like merely adding process steps, but the underlying complexity and precision demands were devastating. Xiuxiu mentally sketched this process:
**Pattern Decomposition:** First, complex EDA software performs **decomposition algorithms** on the original high‑density circuit design. It's like separating an extremely fine color map into several transparent films each containing only specific‑color lines. The decomposition principle ensures that patterns on each "film" (i.e., each reticle layer) have sufficiently relaxed line‑width and spacing, enabling clear printing by the EUV lithography system given current light intensity and resolution. This itself is a complex combinatorial‑optimization problem, balancing decomposition layers (more layers ease each exposure but increase total cost and cycle) and each layer's pattern complexity. **First Tape‑Out (Layer 1):** Using the first reticle, perform the first EUV exposure. The silicon wafer, coated with metal‑based photoresist, enters the prototype. Under vacuum, faint yet pure 13.5‑nm extreme ultraviolet light emitted from the laser‑produced plasma source is arduously collected by multilayer‑mirror collectors, directed, passes through the reflective reticle, traverses that priceless projection‑optics assembly comprising over a dozen ultra‑precision mirrors, ultimately reducing and printing the first decomposed‑layer pattern onto the wafer's photoresist. After subsequent development, etching, etc., this first‑layer pattern is permanently etched onto the silicon wafer. At this moment, the wafer's pattern is incomplete—merely isolated lines or blocks with large spacing. **Overlay Accuracy—The Lifeline's Red Thread:** Next, perform the second, even third tape‑out. The wafer requires recoating, uses the second, third reticles for subsequent exposures. Here enters the most critical, most fragile link in the entire multiple‑patterning flow—**overlay accuracy**. The pattern formed by the second exposure must achieve **nanometer‑ or even sub‑nanometer‑level precise alignment** with the pattern already etched onto the wafer from the first exposure, in three‑dimensional spatial position! Any tiny misalignment beyond tolerance will cause the final synthesized pattern to distort, short‑circuit, or open‑circuit—the entire chip directly scrapped.
* This places inhuman demands on the lithography system's **dual‑stage system:** it must not only move wafers for exposure with extreme speed and precision, but also possess the ability between two exposures to perform extremely precise measurement and positional compensation based on **alignment marks** on the wafer.
* This places ultimate demands on **reticle** fabrication and thermal stability: relative pattern positions between different reticles must be absolutely accurate.
* This also poses severe challenges to **wafer‑intrinsic** deformation control (due to stresses from prior process steps).
**Final Synthesis:** Only after all decomposed layers are precisely overlaid onto the silicon wafer via EUV lithography and subsequent processing does the original high‑density circuit structure—unattainable in a single exposure—finally become "pieced together."
This is a tightrope‑walking process; each additional exposure introduces overlay‑error risk, increases process complexity and cost. Yet under EUV light intensity insufficient to support single‑exposure ultra‑high resolution, multiple‑patterning is the only feasible bridge to smaller transistor dimensions. Xiuxiu's team's test‑chip tape‑out employed relatively simple **double‑patterning** technology, decomposing one critical interconnect layer into two reticles for processing.
Now, in the laboratory, the prototype was executing the final exposure flow. All preceding decomposition, first exposure, etching, deposition, etc., had been completed; the wafer was once more fed into the prototype for the ultimate pattern "assembly." Inside the control room, the atmosphere stifled breathing; everyone stared at their screens, monitoring every equipment parameter: source‑power stability, vacuum maintenance, stage‑position feedback, optical‑system aberration compensation…
Xiuxiu felt her palms drenched in cold sweat, her heart pounding heavily in her chest. She recalled everything endured to reach this moment: the resolute decision to return from the Netherlands; early‑stage skepticism; countless sleepless nights tackling the light source; despair from reticle defects; fury over supply‑chain strangleholds; and… Mozi's extended hand during her hardest times; Yue'er's cross‑disciplinary inspiration. All coalesced in this machine before her and the silicon wafer being processed.
Time ticked by as if a century passed. Finally, the prototype's status indicator shifted from running‑state blinking green to standby steady blue. The final exposure flow ended. The wafer was gingerly conveyed out by robotic arm, sent to final development and rapid electrical‑testing stages.
The wait that followed was true torment. Xiuxiu and team members gathered outside the test‑chamber observation window, watching engineers operate the probe station, conducting silent dialogue with that wafer bearing so many expectations. No one spoke; only faint equipment hums and each other's suppressed breaths.
Suddenly, the chief test engineer jerked his head up; his face first showed incredulous stupefaction, then a rapturous light exploded from his eyes! Overwhelmed by extreme excitement, his voice cracked, almost roaring:
"It's live! Key pathways all conducting! Pattern… pattern transfer successful! Parameters… parameters within expected range! We… we succeeded!!!"
"Boom—!"
After a brief, death‑like silence, inside and outside the control room, a tsunami‑like frenzy instantly flooded! Emotions suppressed too long erupted like a volcano, utterly unleashed! Engineers, technicians—grey‑haired veterans and newcomers alike—leapt up, frantically embracing, pounding each other's shoulders, many uncontrollably weeping, shouting!
"Success! We did it!"
"EUV! We have our own EUV!"
"From zero to one! This is zero to one!"
Cheers, sobs, applause, overturned‑chairs clatter… interwove into a chaotic yet incredibly moving victory song. This milestone belonged to China's entire lithography enterprise—crystallization of countless youths' sweat and wisdom. They truly, with their own hands, knocked open the door to extreme ultraviolet lithography, the highest hall of global semiconductor manufacturing!
Xiuxiu stood still, body trembling slightly from excitement, tears abruptly gushing, instantly blurring her vision. She didn't wipe them, letting scalding tears flow freely. All pressure, all hardships, at this moment, transformed into incomparable accomplishment and immense happiness torrents. She'd done it, her team had done it! They truly turned that seemingly impossible dream into tangible reality!
Amid the boiling cheers, amidst team members crowding to excitedly hug her, Xiuxiu's first clear thought wasn't celebration, nor reporting to superiors—but:
She must share this joy, this zero‑to‑one colossal success, with those two people—with the utmost speed.
She practically stumbled through the crowd, reaching a relatively quiet corner, hands trembling, simultaneously tapping Mozi and the small‑group contacts on the encrypted communicator. She inhaled deeply, striving to steady her voice choked with emotion, speaking into the microphone, clear and firm:
"Mozi, Yue'er‑jie! We… our EUV prototype… first tape‑out… succeeded!"
She transmitted the deafening cheers from the test chamber as background audio. She knew they'd understand—everything held behind those simple words "succeeded."
Only after doing this did she turn, facing that boiling ocean of joy. Tears streaked her face, yet she radiated a smile brighter than sunlight outside. She spread her arms, embracing her team, embracing this hard‑won victory belonging to them all. The door to the EUV era had been pushed open by their strenuous efforts; the world beyond was vast and challenging, but they, now, feared nothing.